UG01 Overview
The UG series of ULCs is well suited for conversion of medium- to-large sized CPLDs and FPGAs. Devices are implemented in high-performance CMOS technology with 0.6-µm (drawn) channel lengths, and are capable of supporting flip-flop toggle rates of 350 MHz, operating clock frequencies up to 150 MHz and input to output delays as fast as 5 ns. The architecture of the UG series allows for efficient conversion of many...
UG01 Key Features
- 250-ps typical cell delay
- 350-MHz toggle rate D Full range of packages: DIP, SOIC, LCC/PLCC, PQFP/TQFP, PGA/PPGA D 3.3V and/or 5.0V operation. D L
- 25 May. 98