Description
added
New HW Revision SODIMM Pin 106, 107, 152, 178 changed assignement; Ext_nCSx available
CPLD register change (RDnWR can be controlled separately; nOE signal for SODIMM Pin 97 tri-state with CPLD)
Changed some pin names (MA to address, MD to data)
PXA320: changed pin names from -> to (these pins
Features
- 5 1.4 Reference Documents 6
1.4.1 Marvell PXA320 Processor Based on Intel Xscale Technology 6 1.4.2 Ethernet Controller 6 1.4.3 Audio Codec and Touch Screen Controller6 1.4.4 Power Management IC 6 1.4.5 CPLD 6
2. Architecture Overview7 2.1 Block Diagram 7
3. Colibri PXA320 Connectors8 3.1 Physical Locations 8 3.2 Assignment 8
3.2.1 SODIMM 200 (X1)8 3.2.2 JTAG (X2) 10 3.2.3 Additional GPIOs (X3).