XC74WL240ASR Datasheet PDF - Torex Semiconductor CMOS Logic Specs

XC74WL240ASR - CMOS Logic

Datasheet Summary

Features

of the CMOS logic, gives way to high speed operations which enables LS-TTL. With wave forming buffers connected internally, stabilized output can be achieved as the series offers high noise immunity. As the series is integrated into a mini molded, MSOP-8B package, high density mounting is possible. High Speed Operations : tpd = 3.8ns TYP (VCC=5V) Operating Voltage Range : 2V ~ 5.5V Low Power Consumption : 2µA (max) Small Package : MSOP-8B GPalmtops GDigital Equipment : tpd =3.8ns TYP NLow Pow.

Datasheet Details

Part number	XC74WL240ASR
Manufacturer	Torex Semiconductor
File Size	138.42 KB
Description	CMOS Logic
Datasheet	XC74WL240ASR Datasheet
Additional preview pages of the XC74WL240ASR datasheet.

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Full PDF Text Transcription

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NCMOS Logic Dual Bus Buffer (Inverted 3-state outputs) NOperating Voltage Range : 2V ~ 5.5V NHigh Speed Operations NMSOP-8B Package XC74WL240ASR is Dual Bus Buffer manufactured using silicon gate CMOS processes. The small quiescent current, which is one of the features of the CMOS logic, gives way to high speed operations which enables LS-TTL. With wave forming buffers connected internally, stabilized output can be achieved as the series offers high noise immunity. As the series is integrated into a mini molded, MSOP-8B package, high density mounting is possible. High Speed Operations : tpd = 3.8ns TYP (VCC=5V) Operating Voltage Range : 2V ~ 5.5V Low Power Consumption : 2µA (max) Small Package : MSOP-8B GPalmtops GDigital Equipment : tpd =3.

Published: Apr 16, 2005 |