TC55VBM316AFTN Datasheet PDF - Toshiba Semiconductor MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS Specs

TC55VBM316AFTN - MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

Datasheet Summary

Description

The TC55VBM316AFTN/ASTN is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16 bits/1,048,576 words by 8 bits.

Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.6 V power supply.

Features

Low-power dissipation Operating: 9 mW/MHz (typical) Single power supply voltage of 2.3 to 3.6 V Power down features using CE1 and CE2 Data retention supply voltage of 1.5 to 3.6 V Direct TTL compatibility for all inputs and outputs Wide operating temperature range of.
40° to 85°C Standby Current (maximum): 3.6 V 3.0 V 10 µA 5 µA.
Access Times (maximum): TC55VBM316AFTN/ASTN 40 Access Time CE1 Access Time 55.

Datasheet Details

Part number	TC55VBM316AFTN
Manufacturer	Toshiba Semiconductor
File Size	258.28 KB
Description	MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
Datasheet	TC55VBM316AFTN Datasheet
Additional preview pages of the TC55VBM316AFTN datasheet.

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Full PDF Text Transcription

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TC55VBM316AFTN/ASTN40,55 www.DataSheet4U.com TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 524,288-WORD BY 16-BIT/1,048,576-WORD BY 8-BIT FULL CMOS STATIC RAM DESCRIPTION The TC55VBM316AFTN/ASTN is a 8,388,608-bit static random access memory (SRAM) organized as 524,288 words by 16 bits/1,048,576 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 2.3 to 3.6 V power supply. Advanced circuit technology provides both high speed and low power at an operating current of 3 mA/MHz and a minimum cycle time of 40 ns. It is automatically placed in low-power mode at 0.7 µA standby current (at VDD = 3 V, Ta = 25°C, typical) when chip enable ( CE1 ) is asserted high or (CE2) is asserted low.

Published: Jul 30, 2009 |