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TC74AC139F - Dual 2-to-4 Line Decoder

Key Features

  • High speed: tpd = 5.9 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 8 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 V to 5.5 V.
  • Pin and function compatible with 74F139 Pin Assignment TC74AC139P TC74AC13.

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Datasheet Details

Part number TC74AC139F
Manufacturer Toshiba
File Size 250.75 KB
Description Dual 2-to-4 Line Decoder
Datasheet download datasheet TC74AC139F Datasheet

Full PDF Text Transcription for TC74AC139F (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for TC74AC139F. For precise diagrams, and layout, please refer to the original PDF.

TC74AC139P/F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74AC139P, TC74AC139F, TC74AC139FT Dual 2-to-4 Line Decoder The TC74AC139 is an advanced high ...

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C74AC139FT Dual 2-to-4 Line Decoder The TC74AC139 is an advanced high speed CMOS 2-to-4 LINE DECODER fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications. When the enable input is held “H”, all four outputs are fixed at a high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient