Overview: TC74HC390AP/AF
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74HC390AP, TC74HC390AF
Dual Decade Counter The TC74HC390A is a high speed CMOS DUAL DECADE COUNTER fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.
It consists of two independent 4-bit counters, each posed of a divide-by-two and a divide-by-five counter. The divide-by-two counter is incremented on the negative going transition of clock A ( CKA ). The divided-by-five counter is incremented on the negative going transition of clock B ( CKB ). The counter can be cascaded to form decade, bi-quinary, or various binations up to a divide-by-100 counter. When the CLR input is set high, the Q outputs are set to low independent of the clock inputs.
All inputs are equipped with protection circuits against static discharge or transient excess voltage.
