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TC74HCT373AP - Octal D-Type Latch

Download the TC74HCT373AP datasheet PDF. This datasheet also covers the TC74HCT373AF variant, as both devices belong to the same octal d-type latch family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: tpd = 17 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • Compatible with TTL outputs: VIH = 2 V (min) VIL = 0.8 V (max).
  • Wide interfacing ability: LSTTL, NMOS, CMOS.
  • Output drive capability: 15 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 6 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Pin and function compatible with 74LS373 Pin Assignment TC74HCT373AP.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74HCT373AF_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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TC74HCT373AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HCT373AP, TC74HCT373AF Octal D-Type Latch with 3-State Output The TC74HCT373A is a high speed CMOS OCTAL LATCH with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Their inputs are compatible with TTL, NMOS, and CMOS output voltage levels. These 8-bit D-type latches are controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 17 ns (typ.
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