TC74HCT574AF Overview
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Its inputs are patible with TTL, NMOS, and CMOS output voltage levels. Its 8-bit D-type flip-flops is controlled by a clock input (CK) and an output enable input ( OE.
TC74HCT574AF Key Features
- High speed: fmax = 62 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- patible with TTL outputs: VIL = 0.8 V (min)
- Output drive capability: 15 LSTTL loads
- Symmetrical output impedance: |IOH| = IOL = 6 mA (min)
- Balanced propagation delays: tpLH ∼- tpHL
- Pin and function patible with 74LS574