TC74HCT688AP Overview
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are patible with TTL, NMOS and CMOS output voltage leveles.
TC74HCT688AP Key Features
- High speed: tpd = 17 ns (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- patible with TTL outputs: VIH = 2.0 V (min)
- Output drive capability: 10 LSTTL loads
- Symmetrical output impedance: |IOH| = IOL = 4 mA (min)
- Balanced propagation delays: tpLH ∼- tpHL
- Pin and function patible with 74LS688