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TC74VCX2573FT - Low-Voltage Octal D-Type Latch

Download the TC74VCX2573FT datasheet PDF. This datasheet also covers the TC74VCX2573FK variant, as both devices belong to the same low-voltage octal d-type latch family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • 26-Ω series resistors on outputs.
  • Low-voltage operation: VCC = 1.8 to 3.6 V.
  • High-speed operation: tpd = 5.1 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 6.1 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 9.8 ns (max) (VCC = 1.8 V).
  • Output current: IOH/IOL = ±12 mA (min) (VCC = 3.0 V) : IOH/IOL = ±8 mA (min) (VCC = 2.3 V) Weight TSSOP20-P-0044-0.65A VSSOP20-P-0030-0.50 : IOH/IOL = ±4 mA (min) (VCC = 1.8 V).
  • Latch-up performance:.
  • 300 mA.
  • ES.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VCX2573FK_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
TC74VCX2574FK Low-Voltage Octal D-Type Flip-Flop Toshiba
TC74VCX2574FT Low-Voltage Octal D-Type Flip-Flop Toshiba
TC74VCX257FK Low-Voltage Quad 2-Channel Multiplexer Toshiba
TC74VCX257FT Low-Voltage Quad 2-Channel Multiplexer Toshiba
TC74VCX2541FK Low-Voltage Octal Bus Buffer Toshiba

Other Datasheets by Toshiba

Part Number Description
TC74VCX2573FK Low-Voltage Octal D-Type Latch
TC74VCX2125FK Low-Voltage Quad Bus Buffer
TC74VHC03F Quad 2-Input NAND Gate
TC74VHC03FK Quad 2-Input NAND Gate
TC74VHC03FN Quad 2-Input NAND Gate

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74VCX2573FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCX2573FT, TC74VCX2573FK Low-Voltage Octal D-Type Latch with 3.6-V Tolerant Inputs and Outputs The TC74VCX2573 is a high-performance CMOS octal D-type latch. Designed for use in 1.8, 2.5 or 3.3 Volt systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. It is also designed with overvoltage tolerant inputs and outputs up to 3.6 V. This 8 bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high-impedance state. The 26-Ω series resistor helps reducing output overshoot and undershoot without external resistor.