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TC74VHC9541P - Octal Universal Schmitt Buffer

Download the TC74VHC9541P datasheet PDF. This datasheet also covers the TC74VHC9541FK variant, as both devices belong to the same octal universal schmitt buffer family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • High speed: tpd = 5.0 ns (typ. ) (VCC = 5 V).
  • Low supply current: ICC = 4 A (max) (Ta = 25°C).
  • All inputs are provided with power-down protection.
  • Symmetrical rise and fall delays: tpLH  tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Pin-compatible with TC74VHC540 and TC74VHC541 TC74VHC9541P TC74VHC9541FK Weight DIP20-P-300-2.54A: VSSOP20-P-0030-0.50: 1.30 g (typ. ) 0.03 g (typ. ) © 2018 1 Toshiba Electronic Devices & Storage Corporation Start.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHC9541FK_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC74VHC9541P
Manufacturer Toshiba
File Size 186.97 KB
Description Octal Universal Schmitt Buffer
Datasheet download datasheet TC74VHC9541P Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74VHC9541P/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC9541P, TC74VHC9541FK Octal Universal Schmitt Buffer with 3-State Outputs The TC74VHC9541 is an ultra-high-speed octal Schmitt buffer fabricated using silicon-gate CMOS technology. The TC74VHC9541 combines low power consumption of CMOS with Schottky TTL speeds. The outputs can be put in the high-impedance state by placing a logic HIGH on the Enable ( G ) input. The CONT input determines the logical inversion of data. A logic LOW on the CONT input configures the TC74VHC9541 as an inverter; a logic HIGH on the CONT input configures the TC74VHC9541 as a buffer. All the inputs have hysteresis between the positive-going and negativegoing thresholds.