TC7SP3125TU Datasheet | Toshiba

CMOS Digital Integrated Circuits Silicon Monolithic 1. Functional Description - Low-Voltage, Low-Power 1-Bit Dual-Supply Bus Buffer 2. General The TC7SP3125TU is an advanced high-speed CMOS 1-bit dual supply voltage interface bus buffer fabricated with silicon gate CMOS technology. It is also designed with over voltage tolerant inputs and outputs up to 3.6 V. Designed for use as an interface between a 1.2 V, 1.5 V, 1.8 V, or 2.5 V bus and a 1.8 V, 2.5 V or 3.3 V bus in mixed 1.2 V, 1.5 V, 1.8 V or 2.5 V/1.8 V, 2.5 V or 3.3 V supply systems. The A-input interfaces with the 1.2 V, 1.5 V, 1.8 V or 2.5 V bus, the B-output with the 1.8 V, 2.5 V, 3.3 V bus. The enable input (OE) can be used to disable the device so that the signal lines are effectively isolated. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (Note) (1) Level converter for interfacing 1.2 V to 1.8 V, 1.2 V to 2.5 V, 1.2 V to 3.3 V, 1.5 V to 2.5 V, 1.5 V to 3.3 V, 1.8 V to 2.5 V, 1.8 V to 3.3 V, 2.5 V to 3.3 V system. (2) High-speed operation: tpd = 6.8 ns (max) (VCCA = 2.5 ± 0.2 V, VCCB = 3.3 ± 0.3 V) tpd = 7.8 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 3.3 ± 0.3 V) tpd = 8.6 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 3.3 ± 0.3 V) tpd = 22 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 3.3 ± 0.3 V) tpd = 9.5 ns (max) (VCCA = 1.8 ± 0.15 V, VCCB = 2.5 ± 0.2 V) tpd = 10.5 ns (max) (VCCA = 1.5 ± 0.1 V, VCCB = 2.5 ± 0.2 V) tpd = 23 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 2.5 ± 0.2 V) tpd = 30 ns (max) (VCCA = 1.2 ± 0.1 V, VCCB = 1.8 ± 0.15 V) (3) Output current: |IOHB|/IOLB = 12 m A (min) (VCCB = 3.0 V) |IOHB|/IOLB = 9 m A (min) (VCCB = 2.3 V) |IOHB|/IOLB = 3 m A (min) (VCCB = 1.65 V) (4) Ultra-small package: UF6 (5) Low power dissipation: By using the new circuit, the power consumption is reduced significantly when OE = "H". Suitable for battery-driven applications such as PDAs and cellular phones. (6) Floating A-bus is permitted. (when OE =...