TMP1962F10AXBG Datasheet | Toshiba

Features The TX19 is a family of high-performance 32-bit microprocessors that offers the speed of a 32-bit RISC solution with the added advantage of a significantly reduced code size of a 16-bit architecture. The instruction set of the TX19 includes as a subset the 32-bit instructions of the TX39, which is based on the MIPS R3000ATM architecture. Additionally, the TX19 supports the MIPS16 Application-Specific Extensions (ASE) for improved code density. .. The TMP1962 is built on a TX19 core processor and a selection of intelligent peripherals. The TMP1962 is suitable for low-voltage and low-power applications. Features of the TMP1962 include the following: (1) TX19 core processor 1) Two instruction set architecture (ISA) modes: 16-bit ISA for code density and 32-bit ISA for speed - - 2) The 16-bit ISA is object-code patible with the code-efficient MIPS16 ASE. The 32-bit ISA is object-code patible with the high-performance TX39 family. High performance bined with low power consumption - High performance - - - - - Single clock cycle execution for most instructions 3-operand putational instructions for high instruction throughput 5-stage pipeline On-chip high-speed memory DSP function: Executes 32-bit x 32-bit multiplier operations in a single clock cycle. 030619EBP - The information contained herein is subject to change without notice. - The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others. - TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when...