TMP86F808DNG Datasheet | Toshiba

TOSHIBA Original CMOS 8-Bit Microcontroller TLCS-870/C Series TMP86F808DMG TMP86F808NG Semiconductor pany Date 2007/8/7 2008/8/29 Revision History Revision First Release Contents Revised Caution in Setting the UART Noise Rejection Time When UART is used, settings of RXDNC are limited depending on the transfer clock specified by BRG. The bination "O" is available but please do not select the bination "- ". The transfer clock generated by timer/counter interrupt is calculated by the following equation : Transfer clock [Hz] = Timer/counter source clock [Hz] ÷ TTREG set value BRG setting Transfer clock [Hz] 000 fc/13 110 (When the transfer clock generated by timer/counter interrupt is the same as the right side column) fc/8 fc/16 fc/32 The setting except the above 00 (No noise rejection) RXDNC setting 01 (Reject pulses shorter than 31/fc[s] as noise) 10 (Reject pulses shorter than 63/fc[s] as noise) - - - 11 (Reject pulses shorter than 127/fc[s] as noise) - - - O - O 2008-08-29 Pin Assignments (Top view) P-SSOP30-56-0.65/P-SDIP-400-1.78 XOUT...