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74HC132D - Quad 2-Input Schmitt NAND Gate

General Description

2.

The 74HC132D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Key Features

  • (1) Wide operating temperature range: Topr = -40 to 125.
  • (Note 1) (2) High speed: tpd = 11 ns (typ. ) at VCC = 5 V (3) Low power dissipation: ICC = 1.0 µA (max) at Ta = 25.
  • (4) High noise immunity: VH = 1.1 V (typ. ) at VCC = 4.5 V (5) Balanced propagation delays: tPLH ≈ tPHL (6) Wide operating voltage range: VCC(opr) = 2.0 to 6.0 V Note 1: Operating Range spec of Topr = -40.
  • to 125.
  • is applicable only for the products which manufactured after July 2020. 4. Packaging SOIC14 ©.

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Datasheet Details

Part number 74HC132D
Manufacturer Toshiba
File Size 198.20 KB
Description Quad 2-Input Schmitt NAND Gate
Datasheet download datasheet 74HC132D Datasheet

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Full PDF Text Transcription (Reference)

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CMOS Digital Integrated Circuits Silicon Monolithic 74HC132D 74HC132D 1. Functional Description • Quad 2-Input Schmitt NAND Gate 2. General The 74HC132D is a high speed CMOS 2-INPUT NAND SCHMITT TRIGGER GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Pin configuration and function are the same as the 74HC00D but the inputs have 25% VCC hysteresis and with its schmitt trigger inputs, the 74HC132D can be used as a line receiver for slow input signals. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) Wide operating temperature range: Topr = -40 to 125 � (Note 1) (2) High speed: tpd = 11 ns (typ.