74HC237D Datasheet 3-to-8 Line Decoder/latch

Manufacturer: Toshiba

Overview: CMOS Digital Integrated Circuits Silicon Monolithic 74HC237D 74HC237D 1.

Datasheet Details

Part number	74HC237D
Manufacturer	Toshiba
File Size	223.66 KB
Description	3-to-8 Line Decoder/Latch
Datasheet	74HC237D-Toshiba.pdf

General Description

• 3-to-8 Line Decoder/Latch 2.

General The 74HC237D is a high speed CMOS 3-to-8 DECODER ADDRESS LATCH fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

Key Features

(1) High speed: tpd = 12 ns (typ. ) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25  (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating voltage range: VCC(opr) = 2.0 V to 6.0 V 4. Packaging SOIC16 ©2016 Toshiba Corporation 1 Start of commercial production 2016-05 2016-08-04 Rev.3.0 5. Pin Assignment 6. Marking 7. IEC Logic Symbol 74HC237D ©2016 Toshiba Corporation 2 2016-08-04 Rev.3.0 8. Truth Table X: Don't care 9. Logic Diagram 74HC237D ©2016 Tosh.

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