TC358748XBG
Key Features
- CSI-2 TX/RX Interface MIPI CSI-2 compliant (Version 1.01 Revision 0.04 - 2 April 2009) Configurable to TX or RX controller Supports up to 1Gbps per data lane Supports up to 4 data lanes Supports video data formats - RX: RAW8/10/12/14, YUV422 (CCIR/ITU 8/10bit), RGB888/666/565 and User-Defined 8-bit - TX: YUV422 (CCIR/ITU 8/10-bit), YUV444, RGB888/666/565 and RAW8/10/12/14
- Parallel Port Interface Supports data formats - 24-bit bus - un-packed format (Both Input and Output mode)
- RGB888/666/565, RAW8/10/12/14 and YUV422 8-bit (on 8/16-bit data bus) and 10-bit data formats.
- YUV444 (Parallel Input mode only) - YUV422 8-bit - ITU BT.656 and ITU BT.601 (Parallel input mode only)
- Up to 100 MHz PCLK frequency for Output mode, and 166 MHz for Input mode.
- I2C Slave Interface (CS = L) Support for normal (100 kHz), fast mode (400 kHz) and special mode (1 MHz) Configure all TC358746AXBG/TC358748XBG internal registers
- SPI Slave Interface (Only applicable in CSIOut configuration, MSEL = H, and CS = H) SPI interface support for up to 25 MHz operation. Configure all TC358746AXBG/TC358748XBG internal registers
