TC518129AFTL-12LV Datasheet PDF (SILICON GATE CMOS PSEUDO STATIC RAM)

TC518129AFTL-12LV - SILICON GATE CMOS PSEUDO STATIC RAM

This page provides the datasheet information for the TC518129AFTL-12LV, a member of the TC518129APL-80LV SILICON GATE CMOS PSEUDO STATIC RAM family.

Description

The TC518129A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits.

The TC518129A-LV utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power storage.

Features

a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface. A CS standby mode interface is incorporated in the TC518129A-LV family, with the CE2 pin in the TC518128A-LV family changed to a CS pin. The TC518129A-LV is available in a 32-pin, 0.6 inch width plastic.

Datasheet Details

Part number	TC518129AFTL-12LV
Manufacturer	Toshiba
File Size	470.28 KB
Description	SILICON GATE CMOS PSEUDO STATIC RAM
Datasheet	TC518129AFTL-12LV Datasheet
Additional preview pages of the TC518129AFTL-12LV datasheet.

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Full PDF Text Transcription

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TOSHIBA TC5I8I29APLIAFLIAFWL-80LVII0LVI I2LV TC5I8I29AF1L-80LVII0LVI I2LV SILICON GATE CMOS 131,072 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description The TC518129A-LV is a 1M bit high speed CMOS pseudo static RAM organized as 131,072 words by 8 bits. The TC518129A-LV utilizes a one transistor dynamic memory cell with CMOS peripheral circuitry to provide high capacity, high speed and low power storage. The TC518129A-LV operates from a single power supply of 3.135V - 5.5V Refreshing is supported by a refresh (RFSro input which enables two types of refreshing - auto refresh and self refresh. The TC518129A-LV features a static RAM-like interface with a write cycle in which the input data is written into the memory cell at the rising edge of RIW thus simplifying the microprocessor interface.

Published: Feb 16, 2017 |