TC551001BPL-10L Datasheet PDF - Toshiba SILICON GATE CMOS STATIC RAM Specs

TC551001BPL-10L - SILICON GATE CMOS STATIC RAM

This page provides the datasheet information for the TC551001BPL-10L, a member of the TC551001BPL-70L SILICON GATE CMOS STATIC RAM family.

Datasheet Summary

Description

The TC551 001 BPL is a 1,048,576 bit CMOS static random access memory organized as 131,072 words by 8 bits and operated from a single 5V power supply.

Features

with an operating current of 5mNMHz (typ. ) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j. tA typically. The TC551 001 BPL has three control inputs. Chip enable inputs (CE1, CE2) allow for device selection and data retention control, while an output enable input (OE) provides fast memory access. The TC551 001 BPL is suitable for use in microprocessor systems where high speed, low powe.

Datasheet Details

Part number	TC551001BPL-10L
Manufacturer	Toshiba
File Size	269.08 KB
Description	SILICON GATE CMOS STATIC RAM
Datasheet	TC551001BPL-10L Datasheet
Additional preview pages of the TC551001BPL-10L datasheet.

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Full PDF Text Transcription

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TOSHIBA TC551001BPL/BFL/BFIL/BTRL-70L/85L/IOL SILICON GATE CMOS 131,072 WORD x 8 BIT STATIC RAM Description The TC551 001 BPL is a 1,048,576 bit CMOS static random access memory organized as 131,072 words by 8 bits and operated from a single 5V power supply. Advanced circuit techniques provide both high speed and low power features with an operating current of 5mNMHz (typ.) and a minimum cycle time of 70ns. When CE1 is a logical high, or CE2 is low, the device is placed in a low power standby mode in which the standby current is 2j.tA typically. The TC551 001 BPL has three control inputs. Chip enable inputs (CE1, CE2) allow for device selection and data retention control, while an output enable input (OE) provides fast memory access.

Published: Feb 20, 2017 |