TC58TEG6DCJTAI0 - NAND memory Toggle DDR1.0

This page provides the datasheet information for the TC58TEG6DCJTAI0, a member of the TC58TEG NAND memory Toggle DDR1.0 family.

Product Overview

Toshiba

Part number	TC58TEG6DCJTAI0
Manufacturer	Toshiba
File Size	247.93 KB
Description	NAND memory Toggle DDR1.0
Datasheet	TC58TEG6DCJTAI0 Datasheet
Additional preview pages of the TC58TEG6DCJTAI0 datasheet.

Toggle DDR is a NAND interface for high performance applications which support data read and write operations using bidirectional DQS.

Toggle DDR NAND has implemented ’Double Data Rate’ without a clock.

Organization Table 1 Product Organization Parameter Part number (TOPER: 0~70℃) Part number (TOPER: -40~85℃) Device capacity Page size Block size Plane size Plane per one LUN LUN per one target Target per one device Number of valid blocks per a device (min) Number of valid blocks per a device (max) TC58TEG6DCJ TC58TEG6DCJTA00 TC58TEG6DCJTAI0 17664×256×2092×8 bits 17664 Bytes (4M + 320 K) Bytes 9459990528Bytes 1 Planes 1 LUNs 1 target 2018 2092 TH58TEG7DCJ TH58TEG7DCJTA20 TH58TEG7DCJTAK0 17664×.

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Published: Sep 15, 2015 |