TC59SM804CMB Datasheet PDF ((TC59SM804CMB - TC59SM816CMB) SDRAM)

TC59SM804CMB - (TC59SM804CMB - TC59SM816CMB) SDRAM

This page provides the datasheet information for the TC59SM804CMB, a member of the TC59SM808CMB (TC59SM804CMB - TC59SM816CMB) SDRAM family.

Description

TC59SM816CMB/CMBL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4 banks × 16 bits and TC59SM808CMB/CMBL is organized as 8,388,608 words × 4 banks × 8 bits and The TC59SM804CMB/CMBL is organized as 16,777,216 words × 4 banks × 4 bits.

Datasheet Details

Part number	TC59SM804CMB
Manufacturer	Toshiba
File Size	2.79 MB
Description	(TC59SM804CMB - TC59SM816CMB) SDRAM
Datasheet	TC59SM804CMB Datasheet
Additional preview pages of the TC59SM804CMB datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com TC59SM816/08/04CMB/CMBL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS × 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION TC59SM816CMB/CMBL is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4 banks × 16 bits and TC59SM808CMB/CMBL is organized as 8,388,608 words × 4 banks × 8 bits and The TC59SM804CMB/CMBL is organized as 16,777,216 words × 4 banks × 4 bits. Fully synchronous operations are referenced to the positive edges of clock input and can transfer data up to 143M words per second. These devices are controlled by commands setting.

Published: Aug 27, 2006 |