Toshiba TC74AC112P
The TC74AC112 is an advanced high speed CMOS DUAL J-K FLIP FLOP fabricated with silicon gate and double-layer metal wiring C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation.| Part No. | TC74AC112P |
|---|---|
| Datasheet | TC74AC112P Download |
| Manufacturer |  Toshiba |
| Description | Dual J-K Flip-Flop |
| Buy | Stock & Price |
FEATURES
● High speed: fmax = 170 MHz (typ.) at VCC = 5 V● Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
● High noise immunity: VNIH = VNIL = 28% VCC (min)
● Symmetrical output impedance: |IOH| = IOL = 24 mA (min) Capability of driving 50 Ω transmission lines.
● Balanced propagation delays: tpLH ∼− tpHL
● Wide operating voltage range: VCC (opr) = 2 to 5.5 V
● Pin and function compatible with 74F112 Pin Assignment TC74AC112P TC74AC112F Weight DIP16-P-300-2.54A SOP16-P-300-1.27A : 1.00 g (typ.) : 0.18 g (typ.) Start of commercial production 1987-05 1 2014-03-01 IEC Logic Symbol TC74AC112P/F Truth Table Inputs CLR PR J K L H X X H L X X L L X X H H L L H H L H H H H L H H H H H H X X X: Don’t care Outputs CK Q Q Function X L H Clear X H L Preset X H H Qn Qn No Change L H H L Qn Qn Toggle Qn Qn No Change System Diagram 2 2014-03-01
ABSOLUTE MAXIMUM RATINGS
(Note 1) TC74AC112P/F Characteristics Symbol Rating Unit Supply voltage range DC input voltage DC output voltage Input diode cu...
