TC74HC237AF Description
It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. It is posed of a 3-bit input latches with a mon GL enable input and 3-to-8 line decoder with enable inputs G1 and G2 . The 3-bit binary data is stored into the input latch on the high level of GL.
TC74HC237AF Key Features
- High s