Datasheet4U Logo Datasheet4U.com

TC74VCXH16827FT - Low-Voltage 20-Bit Bus Buffer

Features

  • Low-voltage operation: VCC = 1.8 to 3.6 V.
  • Bushold on data inputs eliminating the need for external pull-up/pull-down resistors.
  • High-speed operation: tpd = 2.5 ns (max) (VCC = 3.0 to 3.6 V) : tpd = 3.0 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 6.0 ns (max) (VCC = 1.8 V).
  • Output current: IOH/IOL = ±24 mA (min) (VCC = 3.0 V) : IOH/IOL = ±18 mA (min) (VCC = 2.3 V) : IOH/IOL = ±6 mA (min) (VCC = 1.8 V).
  • Latch-up performance:.
  • 300 mA.
  • ESD pe.

📥 Download Datasheet

Datasheet preview – TC74VCXH16827FT

Datasheet Details

Part number TC74VCXH16827FT
Manufacturer Toshiba
File Size 246.61 KB
Description Low-Voltage 20-Bit Bus Buffer
Datasheet download datasheet TC74VCXH16827FT Datasheet
Additional preview pages of the TC74VCXH16827FT datasheet.

📁 Similar Datasheet

  • TC74VCX2125FK - Low-Voltage Quad Bus Buffer (Toshiba Semiconductor)
  • TC74VCX2573FK - Low-Voltage Octal D-Type Latch (Toshiba Semiconductor)
  • TC74VCX2573FT - Low-Voltage Octal D-Type Latch (Toshiba Semiconductor)
  • TC74VHC03F - Quad 2-Input NAND Gate (Toshiba Semiconductor)
  • TC74VHC03FK - Quad 2-Input NAND Gate (Toshiba Semiconductor)
  • TC74VHC03FN - Quad 2-Input NAND Gate (Toshiba Semiconductor)
  • TC74VHC03FT - Quad 2-Input NAND Gate (Toshiba Semiconductor)
  • TC74VHC9273FK - Octal D-Type Flip-Flop (Toshiba Semiconductor)
  • TC74VHC9273FT - CMOS Digital Integrated Circuit Silicon Monolithic (Toshiba Semiconductor)
  • TC74VHC9273P - Octal D-Type Flip-Flop (Toshiba Semiconductor)
Other Datasheets by Toshiba

Full PDF Text Transcription

Click to expand full text
TC74VCXH16827FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VCXH16827FT Low-Voltage 20-Bit Bus Buffer with Bushold The TC74VCXH16827FT is a high-performance CMOS 20-bit bus buffer. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The TC74VCXH16827FT is composed of two 10-bit sections with separate output-enable signals. For either 10-bit buffer section, the two output-enable (1OE1and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with 3-state memory address drivers, etc. Weight: 0.25 g (typ.
Published: |