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TC74VHC157FK - Quad 2-Channel Multiplexer

Download the TC74VHC157FK datasheet PDF. This datasheet also covers the TC74VHC157FT variant, as both devices belong to the same quad 2-channel multiplexer family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: tpd = 4.1 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 V to 5.5 V.
  • Low noise: VOLP = 0.8 V (max).
  • Pin and function compatible with 74ALS157 TC74VHC157F TC74VHC157FK Weight SOP16-P-300-1.27A VSSOP16-P-0030-0.50 : 0.18.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHC157FT_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
TC74VHC03F Quad 2-Input NAND Gate Toshiba Semiconductor
TC74VHC03FK Quad 2-Input NAND Gate Toshiba Semiconductor
TC74VHC03FN Quad 2-Input NAND Gate Toshiba Semiconductor
TC74VHC03FT Quad 2-Input NAND Gate Toshiba Semiconductor
TC74VHC9273FK Octal D-Type Flip-Flop Toshiba Semiconductor

Other Datasheets by Toshiba

Part Number Description
TC74VHC157F Quad 2-Channel Multiplexer
TC74VHC157FN QUAD 2-CHANNEL MULTIPLEXER
TC74VHC157FT QUAD 2-CHANNEL MULTIPLEXER
TC74VHC153F Dual 4-Channel Multiplexer
TC74VHC153FK Dual 4-Channel Multiplexer

Full PDF Text Transcription

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TC74VHC157F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC157F, TC74VHC157FK Quad 2-Channel Multiplexer The TC74VHC157 is an advanced high speed CMOS QUAD 2CHANNEL MULTIPLEXER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It consists of four 2-input digital multiplexers with common select and strobe inputs. When the STROBE input is held “H” level, selection of data is inhibited and all the outputs become “L” level. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs. An Input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage.
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