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TC74VHC161FN - SYNCHROMOUS PRESETTABLE 4-BIT COUNTER

Download the TC74VHC161FN datasheet PDF. This datasheet also covers the TC74VHC161 variant, as both devices belong to the same synchromous presettable 4-bit counter family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • High speed: fmax = 185 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 µA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Low noise: VOLP = 0.8 V (max).
  • Pin and function compatible with 74ALS161/163 TC74VHC161FN, TC74VHC163FN TC74VHC161FT,.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHC161_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC74VHC161FN
Manufacturer Toshiba
File Size 464.40 KB
Description SYNCHROMOUS PRESETTABLE 4-BIT COUNTER
Datasheet download datasheet TC74VHC161FN Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74VHC161,163F/FN/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC161F, TC74VHC161FN, TC74VHC161FT TC74VHC163F, TC74VHC163FN, TC74VHC163FT Synchronous Presettable 4-Bit Counter TC74VHC161F/FN/FT Binary, Asynchronous Clear TC74VHC163F/FN/FT Binary, Synchronous Clear Note: xxxFN (JEDEC SOP) is not available in Japan. TC74VHC161F, TC74VHC163F The TC74VHC 161 and 163 are advanced high speed CMOS SYNCHRONOUS PRESETTABLE 4 BIT BINARY COUNTERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The CK input is active on the rising edge. Both LOAD and CLR inputs are active on low logic level.