TC74VHC164FK Overview
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. It consists of a serial-in, parallel-out 8-bit shift register with a CLOCK input and an overriding CLEAR input. Two serial data inputs (A, B) are provided so that one may be used as a data enable.
TC74VHC164FK Key Features
- High speed: fmax = 175 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Power down protection is provided on all inputs
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 to 5.5 V
- Low noise: VOLP = 0.8 V (max)
- Pin and function patible with 74ALS164