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TC74VHC175FN - QUAD D-TYPE FLIP-FLOP WITH CLEAR

Features

  • High speed: fmax = 210 MHz (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Low noise: VOLP = 0.8 V (max).
  • Pin and function compatible with 74ALS175 Note: xxxFN (JEDEC SOP) is not available in Ja.

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Datasheet Details

Part number TC74VHC175FN
Manufacturer Toshiba
File Size 221.38 KB
Description QUAD D-TYPE FLIP-FLOP WITH CLEAR
Datasheet download datasheet TC74VHC175FN Datasheet
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TC74VHC175F/FN/FT/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC175F,TC74VHC175FN,TC74VHC175FT,TC74VHC175FK Quad D-Type Flip Flop with Clear The TC74VHC175 is an advanced high speed CMOS QUAD D-TYPE FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. These four flip-flops are controlled by a clock input (CK) and a clear input ( CLR ). The information data applied to the D inputs (D1 thru D4) are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the positive-going edge of the clock pulse.
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