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TC74VHC238FK - 3-to-8 Line Decoder

Download the TC74VHC238FK datasheet PDF. This datasheet also covers the TC74VHC238F variant, as both devices belong to the same 3-to-8 line decoder family and are provided as variant models within a single manufacturer datasheet.

Features

  • High speed: tpd = 5.5 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Power down protection is provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 5.5 V.
  • Pin and function compatible with 74ALS238 Weight SOP16-P-300-1.27A VSSOP16-P-0030-0.50 : 0.18 g (typ. ) : 0.02 g (typ. ) © 2015-2019 1 Toshiba Electronic De.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74VHC238F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

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Other Datasheets by Toshiba

Part Number Description
TC74VHC238F 3-to-8 Line Decoder
TC74VHC238FN 3-TO-8 LINE DECODER
TC74VHC238FS 3-TO-8 LINE DECODER
TC74VHC238FT 3-TO-8 LINE DECODER
TC74VHC20F Dual 4-Input NAND Gate

Full PDF Text Transcription

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TC74VHC238F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74VHC238F, TC74VHC238FK 3-to-8 Line Decoder The TC74VHC238 is an advanced high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. When the device is enabled, 3 Binary Select inputs (A, B and C) determine which one of the outputs (Y0-Y7) will go High. When enable input G1 is held low or either G2A or G2B is held high, decoding function is inhibited and all outputs go Low. G1 G2A , and G2B inputs are provided to ease cascade connection and for use as an address decoder for memory systems. An input protection circuit ensures that 0 to 5.
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