TC74VHCT367AFN Overview
They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. They contain six buffers ;four buffers are controlled by an enable input ( G1 ), and the other two buffers are controlled by another enable input ( G2 ). The outputs of each buffer group are enabled when G1 and/or G2 inputs are held low;.
TC74VHCT367AFN Key Features
- High speed: tpd = 4.7 ns (typ.) at VCC = 5 V
- Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
- patible with TTL inputs: VIL = 0.8 V (max)
- Power down protection is provided on all inputs and outputs
- Balanced propagation delays: tpLH ≈ tpHL
- Low noise: VOLP = 0.8 V (max)
- Pin and function patible with the 74 series