TC74VHCT74AFN Overview
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are acplished by setting the appropriate input low.
TC74VHCT74AFN Key Features
- High speed: fmax = 160 MHz (typ.) at VCC = 5 V
- Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
- patible with TTL inputs: VIL = 0.8 V (max)
- Power down protection is provided on all inputs and outputs
- Balanced propagation delays: tpLH ≈ tpHL
- Pin and function patible with the 74 series