TD62C853F
FEATURES l 8 bit serial- in parallel- out shift register / latch driver (Bi- CMOS process) l Maximum output sustaining voltage ; 50 V l Maximum output current ; TD62C853F 200 m A / ch (Low saturation type) TD62C854F 500 m A / ch (darlington type) l CMOS patible inputs l Package ; SSOP24- P- 300- 1.00
Weight: 0.32 g (Typ.)
Note:
S- OUT pin is sensitive against Latch- up. (Latch- up performance is under 30 m A) Please connect an external resistor to S- OUT pin in series due to protect this device from Latch- up. (Remended resistance: R = 100 [Ω])
PIN CONNECTION (TOP VIEW)
1 2001-07-05
BLOCK DIAGRAM TIMING DIAGRAM
TD62C853,854F
2 2001-07-05
TD62C853,854F
EQUIVALENT CIRCUITS OF INPUTS AND OUTPUTS S- IN, CLOCK terminal equivalent circuits LATCH , RESET terminal equivalent circuits
ENABLE terminal equivalent circuits
S- OUT terminal equivalent circuits
Output terminal equivalent circuits (TD62C853F)
Output terminal equivalent circuits (TD62C854F)
Note: The output parasitic diode cannot be...
