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TMM41257T-12 - N-channel dynamic RAM

Download the TMM41257T-12 datasheet PDF. This datasheet also covers the TMM41257 variant, as both devices belong to the same n-channel dynamic ram family and are provided as variant models within a single manufacturer datasheet.

Description

The TMM41257P/T is the N-channel dynamic RAM organized 262,144 words by 1 bit.

Multiplexed address inputs permit the TMM41257P/T to be packaged in a standard 16 pin plastic DIP and 18 pin plastic leaded chip carrier.

Features

  • include single power supply of 5V±10% tolerance, direct interfacing capability with high performance logic families such as schottky TTl. In addition to the RAS only refresh mode, a CAS before RAS automatic refresh is available. Another special feature of TMM41257P/T is nibble mode, allowi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TMM41257-Toshiba.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by Toshiba

Part Number Description
TMM41257T-15 N-channel dynamic RAM
TMM41257AP-10 N-channel dynamic RAM
TMM41257AP-12 N-channel dynamic RAM
TMM41257AP-15 N-channel dynamic RAM
TMM41257AT-10 N-channel dynamic RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TOSHIBA MOS MEMORY PRODUCT 262,144 WORD X 1 BIT DYNAMIC RAM SILICON MONOLITHIC N-CHANNEL SILICON GATE MOS TMM41257P/T-12 TMM41257P/T-15 DESCRIPTION The TMM41257P/T is the N-channel dynamic RAM organized 262,144 words by 1 bit. Multiplexed address inputs permit the TMM41257P/T to be packaged in a standard 16 pin plastic DIP and 18 pin plastic leaded chip carrier. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. The double layered MOS technology with polycide and poly Si permits the TMM41257P/T high speed operation. Also, the advanced circuit techniques have realized low power dissipation.
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