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TS128MEP6100 Datasheet 128mb 90pin Pc133 Cl3 Sdram

Manufacturer: Transcend Information

Overview: the use of system clock. I/O transactions are possible on every clock cycle. Range of operation frequencies, programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

General Description

t e The TS128MEP6100 is a 32M bit x 32 Synchronous e memory modules.

The Dynamic RAM high-density h S of 4 pieces of CMOS 16Mx16bits TS128MEP6100 consists a t in TSOP-II 400mil packages on a 90-pin Synchronous DRAMs a printed circuitD board.

The TS128MEP6100 is a one Line Memory .

Key Features

  • Performance Range: PC133. Burst Mode Operation. Auto and Self Refresh. LVTTL compatible inputs and outputs. Single 3.3V + 0.3V power supply. MRS cycle with address key programs. Latency (Access from column address) Burst Length (1,2,4,8 & Full Page) Data Scramble (Sequential & Interleave).
  • All inputs are sampled at the positive going edge of the system clock. w w . D w t a S a e h t e U 4 PCB: 09-1730 B . c D m o TS.

TS128MEP6100 Distributor