TQPHT Datasheet | TriQuint Semiconductor

Features Metal 2 Dielectric Metal 1 Dielectric MIM Metal Metal 2 - 4um Dielectric Metal 1 - 2um - - - - - Metal 1 Ni Cr Isolation Implant Isolation Implant Nitride N+ Pseudomorphic Channel Metal 0 p HEMT MIM Capacitor Semi-Insulating Ga As Substrate Ni Cr Resistor - - - - - - 0.5 um p HEMT Device Cross-Section .. D-Mode, -0.8 V Vp In Ga As Active Layer p HEMT Process 0.5 um Optical Lithography Gates 17 V D-G Breakdown Voltage High Density Interconnects: - 2 Global - 1 Local High-Q Passives Thin Film Resistors High Value Capacitors Backside Vias Optional Based on Production 0.25 µm p HEMT and Passives Processes TOM3 FET Models Available General Description Tri Quint’s 0.5 µm p HEMT process is based on our production released 0.25 µm gate process. TQPHT substitutes lower cost optical lithography in place of e-beam and adds Tri Quint’s unique thick metal scheme. This process is targeted for high efficiency and linearity in power amplifiers, low noise amplifiers, and linear, low loss and high isolation RF switch applications. The TQPHT process offers a D-Mode p HEMT with a - 0.8 V pinch off. The three metal interconnecting layers are encapsulated in a high performance dielectric that allows wiring flexibility, optimized die size and plastic packaging simplicity. Precision Ni Cr resistors and high value MIM capacitors are included allowing higher levels of integration, while maintaining smaller, cost - effective die sizes. Applications - - - - Highly Efficient and Linear Power Amplifiers Low Loss, High Isolation Switches for Wireless Transceivers and Basestations Higher Supply Voltage Applications Integrated RF Front Ends- LNA, SW, PA Fully Released Production Process Page 1 of 5; Rev 2.0 7/22/03 Production Process 0.5 um p HEMT Foundry Service TQPHT Process Details Process Details @ Vds = 3.0V Element D-Mode p HEMT Parameter Vp (1u A/um) Idss Idh (Ig=1ua/um) Gm (50% Idss) Breakdown, Vds Ft @ 50% Idss Fmax @ 50% Idss Coff @Vds=0, Vgs= -2.5V Ron @ Idss Value -0.8...