UMC UM82C206
The UM82C206 Integrated Peripheral Controller includes two 8237 DMA controllers, two 8259 interrupt controllers, one 8254 timer/counter, one MC146818 compatible real time clock,an additional 64 bytes CMOS RAM, one 74LS612 memory mapper, and some top level decoder/configuration logic circuits. It is a single chip integration of all main peripheral parts attached to the X bus of PC/AT architecture. These include an additional 64 bytes of user definable CMOS RAM in real time clock and drastically reduced recovery time for the 8237, 8259 and 8254.
| Part No. |
UM82C206 |
| Datasheet |
UM82C206
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| Manufacturer |
 UMC |
| Description |
Integrated Peripheral Controller |
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FEATURES
| Fully compatible with PC/AT architecture I Fully compatible with 8237 DMA controller, 8259 interrupt controller, 8254 timer/counter, and 146818 real time clock I Provides 7 DMA channels, 13 interrupt request channels, 2 timer/counter channels, and a real time clock | Built in 74LS612 memory mapper for DMA page address I Provides 114 bytes of CMOS RAM memory | 8 MHz DMA clock with programmable internal divider for 4 MHz operation 116M byte DMA address space’ I Programmable wait states for the DMA cycle I Reduced recovery time (120ns) between I/O operations GENERAL DESCRIPTION
While providing full compatibility with PC/AT architecture, the UM82C206 also offers some enhanced features and improved speed performance. Programmable wait state option is provided for the DMA cycles and CPU I/O cycles accessing this chip. This chip also provides programmable 8 or 4 MHz DMA clock selection. The UM82C206 is implemented using advanced 1.5u CMOS design technology and is packaged in an 84-pin PLCC.
