Datasheet Details
| Part number | UM82C481 |
|---|---|
| Manufacturer | UMC |
| File Size | 120.76 KB |
| Description | MEMORY CONTROLLER |
| Datasheet |
 UM82C481 Datasheet
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General Description
The UM82C481, Integrated Memory Controller (IMC), is part of UMC's high performance 80386/ 80486 PC/AT chip set.
It contains sophisticated direct-mapped cache controller with write back operation, and fast page mode DRAM controller.
Key Features
- Built-in cache controller: - Direct-mapped organization with write-back operation - Cache controller can be enabled/disabled - 0 wait state for cache read/write hit if CPU is 80386 - Programmable 80486 read hit wait state for burst mode - Programmable 80486 write hit wait state - Programmable cache line size (4/8/16 bytes) if CPU is 80386 - Flexible cache size: 32/64/128/256/512/1024 KB - Support interleaved cache RAM for high speed CPU - Hidden DRAM refresh to boost system performance - S.