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UM82C481 Datasheet PDF

UMC UM82C481

The UM82C481, Integrated Memory Controller (IMC), is part of UMC's high performance 80386/ 80486 PC/AT chip set. It contains sophisticated direct-mapped cache controller with write back operation, and fast page mode DRAM controller.
Part No. UM82C481
Datasheet UM82C481 Download
Manufacturer
UMC
Description MEMORY CONTROLLER
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UM82C481 datasheet page 1 preview

GENERAL DESCRIPTION

Incorporated with UM82C482, Integrated System Controller (SC), and UM82C206, Integrated Peripheral Controller IPC), IMC provides main memory management function for the PC/AT computer system. Ii_

FEATURES

* Built-in cache controller: - Direct-mapped organization with write-back operation - Cache controller can be enabled/disabled - 0 wait state for cache read/write hit if CPU is 80386 - Programmable 80486 read hit wait state for burst mode - Programmable 80486 write hit wait state - Programmable cache line size (4/8/16 bytes) if CPU is 80386 - Flexible cache size: 32/64/128/256/512/1024 KB - Support interleaved cache RAM for high speed CPU - Hidden DRAM refresh to boost system performance - Support Local Bus Access cycles - Support three independent non-cacheable regions - Video and System BIOS can be cacheable/non-cacheable, write-protected shadow RAM (16 KB resolution for C and D segments) - Support fast GATE A20 to optimize OS/2 operations * Support directly Inte...
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