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U74HC165 - 8-BIT PARALLEL-LOAD SHIFT REGISTER

General Description

The U74HC165 is an 8-bit parallel-load shift register that, when clocked, shifts the data toward a serial (QH) output.

shift/load (SH/ LD ) input.

Key Features

  • S.
  • Complementary Outputs.
  • Direct Overriding Load (Data) Inputs.
  • Gated Clock Inputs.
  • Parallel-to-Serial Data Conversion.

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Full PDF Text Transcription (Reference)

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UNISONIC TECHNOLOGIES CO., LTD U74HC165 8-BIT PARALLEL-LOAD SHIFT REGISTER  DESCRIPTION The U74HC165 is an 8-bit parallel-load shift register that, when clocked, shifts the data toward a serial (QH) output. Parallel-in access to each stage is provided by eight individual direct data (A-H) inputs that are enabled by a low level at shift/load (SH/ LD ) input. The U74HC165 also features a clock-inhibit (CLK INH) function and a complementary serial ( QH ) output. Clocking is accomplished by a low-to-high transition of the clock (CLK) input while SH/ LD is held high and CLK INH is held low. The functions of CLK and CLK INH are interchangeable. Since a low CLK and a low-to-high transition of CLK INH also accomplish clocking, CLK INH should be changed to the high level only while CLK is high.