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UR5512 - 2A DDR BUS TERMINATION REGULATOR

General Description

The UTC UR5512 is a linear regulator which provides up to 2 Amp bi-directional driving and sinking capability for DDR SDRAM bus terminator application.

The output termination voltage tracks the reference voltage applied at VREF pin.

Key Features

  • S.
  • DDR-I and DDR-II termination voltage.

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UR5515 1.5A/3A BUS TERMINATION REGULATOR
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Full PDF Text Transcription (Reference)

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UNISONIC TECHNOLOGIES CO., LTD UR5512 LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR  DESCRIPTION The UTC UR5512 is a linear regulator which provides up to 2 Amp bi-directional driving and sinking capability for DDR SDRAM bus terminator application. The output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force a reference voltage to VREF pin. The UTC UR5512 contains a high-speed operational amplifier to provide excellent response to line/load transient. An active-low shutdown (VREF) pin provides Suspend to RAM (STR) functionality. Additional features include current limiting protection, on-chip thermal shut-down protection.