UM83C002 Overview
The RAM B U F F E R C O N T R O LLE R contains three high-speed DMA channels: a host puter address port, dynamic RAM refresh circuitry, and RAM access priority logic. One of the DMA address counters points inside the buffer RAM for transferring data between the RAM and the disk.
UM83C002 Key Features
- 3 DMA channels
- Host processor port
- RAM access priority network
- Address multiplexing for dynamic RAM
- Multiplexed address and data lines from processor
- Pins arranged for easy integration into 8088/8086
- DMA carry output permits DMA across 64K boun
- 24 bit timer or baud rate generator
- T T L patible inputs and outputs. Outputs drive