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UM83C002 - RAM Buffer Controller

General Description

The RAM B U F F E R C O N T R O LLE R contains three high-speed DMA channels: a host computer address port, dynamic RAM refresh circuitry, and RAM access priority logic.

One of the DMA address counters points inside the buffer RAM for transferring data between the RAM and the disk.

Key Features

  • 3 DMA channels.
  • Host processor port.
  • Refresh circuit for dynamic RAM built-in.
  • RAM access priority network.
  • Address multiplexing for dynamic RAM.
  • Multiplexed address and data lines from processor.
  • Pins arranged for easy integration into 8088/8086 systems.
  • No lost RAM cycles for DMA break-in.
  • DMA carry output permits DMA across 64K boun­ daries.
  • 24 bit timer or baud rate generator.
  • T T L compatible inputs and outputs. Outputs drive 8 L S T.

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Datasheet Details

Part number UM83C002
Manufacturer Unicorn Microelectronics
File Size 663.36 KB
Description RAM Buffer Controller
Datasheet download datasheet UM83C002 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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UM83C002 RAM Buffer Controller Features ■ 3 DMA channels ■ Host processor port ■ Refresh circuit for dynamic RAM built-in ■ RAM access priority network ■ Address multiplexing for dynamic RAM ■ Multiplexed address and data lines from processor ■ Pins arranged for easy integration into 8088/8086 systems ■ No lost RAM cycles for DMA break-in ■ DMA carry output permits DMA across 64K boun­ daries ■ 24 bit timer or baud rate generator ■ T T L compatible inputs and outputs. Outputs drive 8 L S T T L loads General Description The RAM B U F F E R C O N T R O LLE R contains three high-speed DMA channels: a host computer address port, dynamic RAM refresh circuitry, and RAM access priority logic.