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U74AHC125 - QUADRUPLE BUS BUFFER GATE

General Description

The U74AHC125 is a quadruple bus buffer gate with 3-state output.

When OE is high, the Y output is in a high-impedance state.

When OE is low, the device passes non inverted data from the A input to the Y output.

Key Features

  • S.
  • Wide supply voltage range from 2V to 5.5V.
  • Max tPD of 3.8ns from A to Y at 5V, CL=15pF.
  • Low Quiescent Current: ICC = 4 μA (Max. ) at 5.5V.
  • ±8 mA Output Driver at 5V CMOS IC SOP-14.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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UNISONIC TECHNOLOGIES CO., LTD U74AHC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS „ DESCRIPTION The U74AHC125 is a quadruple bus buffer gate with 3-state output. When OE is high, the Y output is in a high-impedance state. When OE is low, the device passes non inverted data from the A input to the Y output. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. „ FEATURES * Wide supply voltage range from 2V to 5.5V * Max tPD of 3.8ns from A to Y at 5V, CL=15pF * Low Quiescent Current: ICC = 4 μA (Max.) at 5.