U74AHCT125 Description
The U74AHCT125 is a quadruple bus buffer gates with 3-state output. When OE is high, the Y output is in a high-impedance state. When OE is low, the device passes noninverted data from the A input to the Y output.
U74AHCT125 Key Features
- TTL-Voltage patible
- Max tPD of 3.8ns from A to Y at 5V, CL=15pF
- Low Quiescent Current: ICC = 2 μA (Max) at 5.5V
- ±8 mA Output Driver at 5V
- ORDERING INFORMATION
- MARKING