Vaishali Semiconductor VT83201
VT83201 is a single-chip, integrated VCXO and Phase Locked Loop (PLL) clock synthesizer. The device uses the VCXO and an analog Phase-Locked Loop (PLL) to accept a 10 MHz to 20 MHz, 30pF (pull range of 200 ppm) crystal input, in order to produce either one or two output clocks.APPLICATIONS
●=●=
●= DSL clock source Set-top boxes Telecom switching
●=
●= MPEG Video clock source HDTV
GENERAL DESCRIPTION
The Vaishali A 0 to 3V control signal is used to fine tune the output clock frequency in the ±100ppm range. Select inputs S0 and S1 are used for frequency and output selection.FEATURES
●=●=
●=
●=
●= 3.3V supply operation Packaged in 16-pin SOIC package Replaces separate VCXO and multiplier Uses inexpensive pullable crystal On-chip VCXO with 200 ppm pull range (±100 ppm)
●=
●= 5V-tolerant control inputs Zero ppm synthesis error in both clocks Figure 1. Functional Block Diagram VDD1 VDD2 VIN X2 Load Cap Control Output Buffer osc Load Caps Low Phase Noise PLL Output Buffer X1 S1:S0 OE CLK2 CLK1 10-20 MHz Pullable Crystal 2001-04-12 Vaishali Semiconductor Page 1 747 Camden Avenue, Suite C Campbell CA 95008 MDST-0011-01 Ph. 408.377.6060 Fax 408.377.6063 VT83201 Figure 2. Pin Configuration VT83201 16 pin SOIC X1 VDD1 VDD1 VIN GND GND GND OE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 X2 NC S1 GND CLK2 VDD2 S0 CLK1 Table 1.