VG26V18165C
Description
VG26(V)18165C 1,048,576 x 16 - Bit CMOS Dynamic RAM The device CMOS Dynamic RAM organized as 1,048,576 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V only power supply.
Key Features
- Single 5V or 3.3V only power supply
- High speed tRAC access time: 50/60ns
- Extended-data-out (EDO) page mode access
- I/O level: TTL compatible (Vcc = 5V) LVTTL compatible (Vcc = 3.3V)
- 4 refresh modes: - RAS only refresh - CAS - before - RAS refresh - Hidden refresh - Self-refresh
- Refresh interval: - RAS only refresh, CAS - before - RAS refresh and hidden refresh: 1024 cycles in 16 ms - Self-refresh: 1024 cycles
- JEDEC standard pinout: 42-pin 400mil SOJ and 50(44)-pin 400mil TSOPII DataShee Document:1G5-0179 Rev.3 Page 1 DataSheet 4 U .com VIS