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DG442B - Improved Quad SPST CMOS Analog Switches

Download the DG442B datasheet PDF. This datasheet also covers the DG441B variant, as both devices belong to the same improved quad spst cmos analog switches family and are provided as variant models within a single manufacturer datasheet.

General Description

The DG441B, DG442B are monolithic quad analog switches designed to provide high speed, low error switching of analog and audio signals.

The DG441B, DG442B are upgrades to the original DG441, DG442.

Key Features

  • Low On-Resistance: 45 .
  • Low Power Consumption: 1 mW.
  • Fast Switching Action - tON: 120 ns.
  • Low Charge Injection - Q: - 1 pC.
  • TTL/CMOS-Compatible Logic.
  • Single Supply Capability.
  • Material categorization: For definitions of compliance please see www. vishay. com/doc?99912.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DG441B_VishaySiliconix.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number DG442B
Manufacturer Vishay
File Size 195.99 KB
Description Improved Quad SPST CMOS Analog Switches
Datasheet download datasheet DG442B Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DG441B, DG442B Vishay Siliconix Improved Quad SPST CMOS Analog Switches DESCRIPTION The DG441B, DG442B are monolithic quad analog switches designed to provide high speed, low error switching of analog and audio signals. The DG441B, DG442B are upgrades to the original DG441, DG442. Combing low on-resistance (45 , typ.) with high speed (tON 120 ns, typ.), the DG441B, DG442B are ideally suited for Data Acquisition, Communication Systems, Automatic Test Equipment, or Medical Instrumentation. Charge injection has been minimized on the drain for use in sample-and-hold circuits. The DG441B, DG442B are built using Vishay Siliconix’s high-voltage silicon-gate process. An epitaxial layer prevents latchup.