SI4913DY Datasheet | Vishay

.. SPICE Device Model Si4913DY Vishay Siliconix Dual P-Channel 20-V (D-S) MOSFET CHARACTERISTICS - P-Channel Vertical DMOS - Macro Model (Subcircuit Model) - Level 3 MOS - Apply for both Linear and Switching Application - Accurate over the - 55 to 125°C Temperature Range - Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the - 55 to 125°C temperature ranges under the pulsed 0-V to 5-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a mercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 70107 S-52287Rev. B, 31-Oct-05 .vishay. 1 SPICE Device Model Si4913DY Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current a Symbol Test Condition Simulated Data 0.75 235 0.0124 0.015 0.019 42 - 0.80 Measured Data Unit VGS(th) ID(on) VDS = VGS, ID = - 500 µA VDS = - 5 V, VGS = - 4.5 V VGS...