SI5468DC Datasheet | Vishay

FEATURES - Halogen-free According to IEC 61249-2-21 Definition - Trench FET® Power MOSFET - 100 % Rg Tested APPLICATIONS 1206-8 Chip FET® D D D D S D D G - System Power - Notebook - Netbook - Load Switch - Low Current DC/DC Marking Code AK XXX Lot Traceability and Date Code Part # Code G Bottom View S N-Channel MOSFET Ordering Information: Si5468DC-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted Parameter Drain-Source Voltage Gate-Source Voltage TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C TC = 25 °C TA = 25 °C TC = 25 °C TC = 70 °C TA = 25 °C TA = 70 °C Symbol VDS VGS ID IDM IS Limit 30 ± 20 6a 6a 6a,b, c 5.5a,b, c 30 4.8 1.9b, c 5.7 3.6 2.3b, c 1.5b, c - 55 to 150 260 A Unit V Continuous Drain Current (TJ = 150 °C) .. Pulsed Drain Current Continuous Source-Drain Diode Current Maximum Power Dissipation PD TJ, Tstg Operating Junction and Storage Temperature Range Soldering Remendations (Peak Temperature)d, e °C THERMAL RESISTANCE RATINGS Parameter Symbol Typical Maximum Unit Rth JA t≤5s 45 55 Maximum Junction-to-Ambientb, f °C/W 18 22 Maximum Junction-to-Foot (Drain) Steady State Rth JF Notes: a. Package limited. b. Surface Mounted on 1" x 1" FR4 board. c. t = 5 s. d. See Solder Profile (.vishay./ppg?73257). The 1206-8 Chip FET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not remended for leadless ponents. f. Maximum under Steady State conditions is 95 °C/W. Document Number: 69072 S09-0316-Rev. A, 02-Mar-09 .vishay. 1 Vishay Siliconix SPECIFICATIONS TJ = 25 °C, unless otherwise noted Parameter Static Drain-Source Breakdown Voltage VDS Temperature Coefficient VGS(th) Temperature Coefficient...