• Part: SI8901EDB
  • Manufacturer: Vishay
  • Size: 247.05 KB
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SI8901EDB Description

The attached spice model describes the typical of the p-channel vertical DMOS. The subcircuit mode is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-to-5V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.