IRLD120 Datasheet | Vishay

FEATURES - Dynamic d V/dt rating - Repetitive avalanche rated - For automatic insertion - End stackable - Logic-level gate drive - RDS(on) specified at VGS = 4 V and 5 V - 175 °C operating temperature - Material categorization: for definitions of pliance please see .vishay./doc?99912 DESCRIPTION Third generation power MOSFETs from Vishay provide the designer with the best bination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The 4 pin DIP package is a low cost machine-insertable case style which can be stacked in multiple binations on standard 0.1" pin centers. The dual drain serves as a thermal link to the mounting surface for power dissipation levels up to 1 W. ORDERING INFORMATION Package Lead (Pb)-free HVMDIP IRLD120Pb F ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted) PARAMETER SYMBOL Drain-source voltage Gate-source voltage Continuous drain current Pulsed drain current a Linear derating factor Single pulse avalanche energy b Repetitive avalanche current a Repetitive avalanche energy a Maximum power dissipation Peak diode recovery dv/dt c Operating junction and storage temperature range Soldering r Remendations (peak temperature) d VGS at 5 V TA = 25 °C TA = 100 °C TA = 25 °C For 10 s VDS VGS EAS IAR EAR PD d V/dt TJ, Tstg Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) b. VDD = 25 V, starting TJ = 25 °C, L = 153 m H, Rg = 25 Ω, IAS = 2.6 A (see fig. 12) c. ISD ≤ 9.2 A, d I/dt ≤ 110 A/μs, VDD ≤ VDS, TJ ≤ 175 °C d. 1.6 mm from case LIMIT 100 ± 10 1.3 0.94 10 0.0083 690 1.3 0.13 1.3 5.5 - 55 to + 175 300d UNIT V W/°C m J A m J W V/ns °C S21-0886-Rev. D, 30-Aug-2021 Document Number: 91310 For technical questions, contact: hvmos.techsupport@vishay. THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT .vishay./doc?91000 .vishay....