VSC7135 Datasheet | Vitesse Semiconductor

Features - Gigabit Ethernet Transceiver @ 1.25Gb/s - pliant to IEEE 802.3Z PMA - TTL Interface patible to PMA-TBI - Monolithic Clock Synthesis and Clock Recovery - No External ponents - 125MHz TTL Reference Clock 1.25Gbits/sec Gigabit Ethernet Transceiver - Low Power Operation - 700 m W - Suitable for Both Coaxial or Optical Link Applications - 64 Pin, 14mm or 10mm Standard PQFP - Single +3.3V Supply General Description The VSC7135 is a 1.25Gb/s Ethernet Transceiver optimized for Gigabit Ethernet or 1000Base-X applications. It accepts 10-bit 8B/10B encoded transmit data, latches it on the rising edge of REFCLK and serializes it onto the TX PECL differential outputs at a baud rate which is ten times the REFCLK frequency. The VSC7135 also samples serial receive data on the RX PECL differential inputs, recovers the clock and data, deserializes it onto the 10-bit receive data bus, outputs two recovered clocks at one-twentieth of the ining baud rate and detects “ma” characters. The VSC7135 contains on-chip PLL circuitry for synthesis of the baud-rate transmit clock, and extraction of the clock from the received serial stream. These circuits are fully monolithic and require no external ponents. VSC7135 Block Diagram EWRAP R0:9 Serial to Parallel ÷ 10 Retimed Data Recovered Clock QD Clock Recovery 2:1 RX+ RX- RCLK RCLKN Frame Logic ÷ 20 ma Detect Resync _DET EN_CDET T0:9 Parallel to Serial Serial Data Synthesized Clock TX+ TX- REFCLK PLL Clock Multiply G52146-0, Rev. 4.0 5/28/98 © VITESSE SEMICONDUCTOR CORPORATION 741 Calle Plano, Camarillo, CA 93012 - 805/388-3700 - FAX: 805/987-5896 Page...